High dynamic global positioning system receiver

A Global Positioning System (GPS) receiver having a number of channels, receives an aggregate of pseudorange code time division modulated signals. The aggregate is converted to baseband and then to digital form for separate processing in the separate channels. A fast fourier transform processor computes the signal energy as a function of Doppler frequency for each correlation lag, and a range and frequency estimator computes estimates of pseudorange, and frequency. Raw estimates from all channels are used to estimate receiver position, velocity, clock offset and clock rate offset in a conventional navigation and control unit, and based on the unit that computes smoothed estimates for the next measurement interval

Code-regenerative clean-up loop for a ranging transponder

Digital processing system phase locks on received ranging signal and creates clean replica of received ranging code. System is broadly applicable to variety of terrestrial ranging problems, including oceanic navigation

A method for reducing sampling jitter in digital control systems

Digital phase lock loop system is designed by smoothing the proportional control with a low pass filter. This method does not significantly affect the loop dynamics when the smoothing filter bandwidth is wide compared to loop bandwidth

Digital filter for reducing sampling jitter in digital control systems Patent

Digital filter for reducing jitter in digital control system

Quasars as very-accurate clock synchronizers

Quasars can be employed to synchronize global data communications, geophysical measurements, and atomic clocks. It is potentially two to three orders of magnitude better than presently-used Moon-bounce system. Comparisons between quasar and clock pulses are used to develop correction or synchronization factors for station clocks

Simple quasi-exponential slope generator

Circuitry for digitally generating an exponentially decaying wave function permits discrete values to be sampled from the exponential waveform for comparison with a binary number of specified accuracy. This exponential-decay generator employs a simple binary counter to count in the sequence of exponential decay

Technique minimizes the effects of dropouts on telemetry records

Recorder deficiencies are minimized by using two-channel system to prepare two tapes, each having noise, wow and flutter, and dropout characteristics of channel on which it was made. Processing tapes by computer and combining signals from two channels produce single tape free of dropouts caused by recording process

Fixed lag smoothers for carrier phase and frequency tracking

The application of fixed lag smoothing algorithms are presented for the problem of estimation of the phase and frequency of a sinusoidal carrier received in the presence of process noise and additive observation noise. A suboptimal structure consists of a phase-locked loop (PLL) followed by a post loop correction to the phase and frequency estimates. When the PLL is operating under a high signal-to-noise ratio, the phase detector is approximately linear, and the smoother equations then correspond to the optimal linear equations for an equivalent linear signal model. The performance of such a smoother can be predicted by the linear filtering theory. However, if the PLL is operating near the threshold region of the signal to noise ratio, the phase detector cannot be assumed to be linear. Then the actual performance of the smoother can significantly differ from that predicted by linear filtering theory. Both the theoretical and simulated performance of such smoothers derived on the basis of various models for the phase of frequency processes are presented

Detection of signals by the digital integrate-and-dump filter with offset sampling

The Integrate and Dump Filter (IDF) is used as a matched filter for the detection of signals in additive white Gaussian noise. The performance of the digital integrate and dump filter is evaluated. The case considered is when symbol times are known and the sampling clock is free running at a constant rate, i.e., the sampling clock is not phase locked to the symbol clock. Degradations in the output signal to noise ratio of the digital implementation due to sampling rate, sampling offset, and finite bandwidth, resulting from the anti-aliasing low pass prefilter, are computed and compared with those of the analog counterpart. It is shown that the digital IDF performs within 0.6 dB of the ideal analog IDF whenever the prefilter bandwidth exceeds four times the symbol rate and when sampling is performed at the Nyquist rate. The loss can be reduced to 0.3 dB by doubling the sampling rate, where 0.2 dB loss results from finite bandwidth and 0.1 dB results from the digital IDF

Digital data transition tracking loop improves data reception

Transition tracking loop eliminates drifts, leakages, and instabilities inherent in analog filters. Major components are the phase detector, loop filter, voltage-controlled oscillator and timing logic